balhau@balhau.net 7345dd2665 Replaced vmovdqa with vmovdqu because the memory is not aligned to 256 bits. Next align the memory and then use the aligned assembly instruction		2021-12-25 19:14:49 +00:00
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cautofree.c	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
cmem.c	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
cnumbers.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
ex1.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
ex2.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
gl1.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
gl2.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
gl3.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
gui1.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
math.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00
sse.cpp	Replaced vmovdqa with vmovdqu because the memory is not aligned to 256 bits. Next align the memory and then use the aligned assembly instruction	2021-12-25 19:14:49 +00:00
volatile.cpp	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00