4 commits

Author	SHA1	Message	Date
balhau@balhau.net	7345dd2665	Replaced vmovdqa with vmovdqu because the memory is not aligned to 256 bits. Next align the memory and then use the aligned assembly instruction	2021-12-25 19:14:49 +00:00
balhau@balhau.net	306f84115c	Refactoring	2021-12-25 17:08:00 +00:00
balhau@balhau.net	1778ace6e7	More on SIMD instructions	2021-12-25 16:21:23 +00:00
balhau@balhau.net	8b82d09726	Refactor code for multi architecture SIMD operations	2021-12-25 14:53:20 +00:00

Renamed from src/cpu/demos/sse.cpp (Browse further)